Parasitic turn-on of power MOSFETs
In fact, the parasitic turn-on (undesired event) of the power MOSFET is more likely than we expected, and the resulting losses are also greater. Parasitic turn-on often damages the MOSFET, and it is difficult to isolate the source of the failure later. The parasitic turn-on mechanism depends on the capacitive divider ratio between the drain-source and gate-source voltages.
Figure 1 is a basic half-bridge configuration that is part of an H-bridge or three-phase bridge. If the MOSFET of the upper half-bridge is turned on, in order to avoid shoot-through and possible MOSFET failure due to overcurrent, one of the lower MOSFETs of the half-bridge must be turned off.
Figure 1 MOSFET half bridge and its inductive load
At this time, the voltage between the gate and the source can be calculated by the following formula (1):
Therefore, even if the drive circuit tries to turn off the MOSFET of the lower tube of the half-bridge, that is, the drive circuit sets the voltage between the gate and the source to 0 (UGS=0V), but because the drain-source voltage changes, and the voltage divider circuit contains meters CGD and gate-source capacitance, so the MOSFET is still at risk of turning on. Capacitive voltage dividers are the fastest voltage dividers, reacting extremely quickly to all transients that occur between drain and source, and especially to high frequency transients within them (ie, UDS with high du/dt). Installing a resistor between gate and source provides some protection against parasitic turn-on, but it has little effect and has no effect on high du/dt values.
The following example illustrates how high and how fast these voltages are:
Figure 2 is a half-bridge configuration of an inverter leg with parasitic elements. Parasitic inductances, resistances and capacitances caused by circuit layout, geometric constraints or MOSFET connection lines cannot be avoided. On the other hand, the circuit in which the inverter is located has the highest di/dt value (typically around 1A/ns), while the phase current of the motor and the current in the power line vary relatively smoothly.
Figure 2 Basic design of inverter half-bridge with parasitic inductance (green part)
The Diode recovery pulse in the MOSFET often produces the highest di/dt in the half bridge. The simultaneous presence of parasitic inductance and high di/dt inductance produces more or less high induced voltage spikes and a lot of high frequency noise in the half bridge. Depending on the size of the parasitic inductance, overvoltage and undervoltage spikes can occur in 12V applications, ranging from 1-2V and tens of volts. In addition to generating high-frequency noise, these voltage spikes can harm MOSFETs, bridge drivers and other ECU components. In addition, they can cause the power MOSFET to turn on unexpectedly.
How to choose a MOSFET to avoid parasitic conduction
Look at formula (1) again:
To prevent parasitic turn-on, the UGS/UDS ratio must be as small as possible, the UDS/UGS ratio must be as large as possible, and the CGS/CGD ratio must be as large as possible. Therefore, it is recommended to:
To be less sensitive to parasitic turn-on, the CGS/CGD ratio must be as large as possible, greater than 15 (or minimum greater than 10).
The following example shows how to extract the required values from the data sheet (the device in this example is an IPB80N04S3-03, OptiMOS-T 40V power MOSFET for motor drive):
It can be calculated: CGD_typ=240pF and CGS_typ=5360pF. The CGS/CGD ratio is 22.3, a value that completely prevents parasitic turn-on.
Figure 3 Capacitor values from the data sheet
In order to know the relationship between these capacitance values and the size of the supply voltage, the data sheet also provides the relationship between the gate-drain capacitance and the gate-source capacitance and the drain-source voltage. Figure 4 is a graph of the relationship between them.
Figure 5 compares the Cgs/Cgd ratio of MOSFETs in different high-current applications such as safety-critical Electronic power steering, or electro-hydraulic power steering, or generators. It can be seen that after using IPB160N04S3-H2, parasitic conduction will not occur, while using the other two MOSFETs, parasitic conduction may still occur.
Figure 4 Typical relationship between gate-drain capacitance and gate-source capacitance and drain-source voltage
Figure 5 CGS/CGD ratio of MOSFET in different high current applications
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