In the previous chapter, we discussed common arithmetic and logical operation instructions. Among them, the leal instruction is more characteristic. In this chapter, we will look at a few more special operation instructions. These instructions allow only 32-bit registers to store 64-bit data. Isn’t it very domineering?
imull, mull instructions
These two instructions look like twins, one is responsible for signed full 64-bit multiplication, and the other is responsible for unsigned full 64-bit multiplication. Careful ape friends will find that the imull instruction seems to be the instruction responsible for multiplication, and the previous multiplication did not distinguish between signed and unsigned, so why is it now a twin instruction.
The instruction we saw in the last chapter is the imul instruction, which, when it operates on double words, is the imull instruction. But the difference is that its general form is imull SD, there are two operands, it will calculate the product of S and D and truncate to double word, and then store in D. Since unsigned and signed binary sequences are the same when truncated, the multiply instruction here does not distinguish between signed and unsigned.
The imull instruction we discuss this time is slightly different from the ordinary multiplication instruction above. It has only one operand, that is to say, its general form is imull S, which can also be seen in the table in the book, The other operand defaults to the %eax register. In the final result, the upper 32 bits are stored in the %edx register, and the lower 32 bits are stored in the %eax register.
Imagine that if we only take the 32-bit result in the %eax register, then the result calculated here is actually S*%eax. At this time, the function of imull S is the same as that of imull SD, except that the destination operand is fixed to % eax nothing more.
This instruction is relatively simple, it simply sign-extends the value of the %eax register to the %edx register by 32 bits, that is, if the highest bit of the binary sequence of the %eax register is 0, the cltd instruction will Set %edx to 32 0s. Conversely, if the highest bit of the binary sequence of the %eax register is 1, the cltd instruction will fill the %edx register with 32 1s.
idivl, divl instructions
These two instructions are similar to the previous imull and mull. They also store the calculation result in two registers, where the remainder is stored in the %edx register, and the quotient is stored in the %eax register. If you understand the previous imull and mull, then idivl and divl will be very simple to understand here.
This chapter introduces several special arithmetic operation instructions. In fact, the operation rules of these instructions are based on 2.X. The binary arithmetic rules introduced in 2.X are the rules for the execution of these instructions. Understanding how these instructions are instructed helps improve our ability to relate the correspondence between program code and assembly code, which is very useful.